Our screening methodology is divided into three stages (primary, secondary and tertiary screening) and is leveraged in our workflows that are tailored to meet customers' specific application requirements.
In fact, fundamental properties of hundreds of materials can be explored quickly and cost-effectively in the Primary Screening stage, based on multiple combinations of source chemistries, precursors and targets, multiple processing parameters and other variables. Primary screening begins with specification of the HPC workflow design and the creation of experiment libraries and design of experiments (DOEs) using proprietary DOE software. In wet-processing
applications, material and chemical compatibility are common points of inquiry.
For films deposited via ALD or PVD, resistivity, dielectric constant (k),
leakage current, barrier properties and mechanical properties can be evaluated.
Primary screening produces a select subset of options ready for secondary
screening.
The Secondary Screening stage takes a more application-specific approach, going beyond basic materials properties to look at unit process development and integrated solutions. More involved characterizations are performed during this stage. Work is done on either blanket films or patterned wafers, including HPC compatible test structures, which allow hundreds (or even thousands) of physical or electrical measurements to be carried out on a single wafer. Once the top candidates are identified, they are moved to the tertiary stage for comprehensive electrical testing.
Work scales up to full-size patterned wafers, either 200mm or 300mm, during Tertiary Screening, with a focus on electrical testing and preparation for a smooth transition into volume production. Electrical performance requirements are constantly assessed using integrated electrical testing to find the best parameter sets.
For fluids-based Tempus workflows, the F-30 module uses sophisticated site-isolated cells proven to correlate to the process performance of high-volume manufacturing tools for applications such as post-CMP clean and post-etch clean. For ALD/PVD-based applications, materials and processes passed on from secondary screening may be scaled up from site-isolated to full-wafer processing to run integrated lots for short-loop reliability and electrical testing. Materials and processes of interest can thus be tested with other upstream and downstream processes, to ensure a smooth transition onto the fab line. An example includes fabrication of MIM short-loop capacitor structures for DRAM applications.
Our HPC-enabled screening methodology is key to all three pillars of our HPC
technology: Massively Parallel Processing, Throughput-Matched Characterizations
and Automation and Analysis-Driven Informatics.
